Jeewant Choudhry
Microelectronics and VLSI Design
July 2024
In order to fulfill the demanding power, performance, and area requirements of next-generation applications, the Internet of Things' (IoT) rapid proliferation has forced considerable breakthroughs in low-power Very Large-Scale Integration (VLSI) design. In today's electronics industry, low power has become a central theme. In the performance and area of VLSI chip design, power dissipation has grown in importance. The main issues below 100nm owing to increased complexity include lowering power usage and overall power management on chip as technology gets smaller. Because lower package costs and longer battery life are priorities for many designs, power optimization is just as crucial as time. In low power VLSI designs, leakage current is also crucial for power control. The percentage of integrated circuits' overall power dissipation that is attributed to leakage current is growing. This Research discusses many approaches, strategies, and power management tactics for low-power circuits and systems. This study offers important insights into the future of low-power VLSI design, with the goal of facilitating the smooth and effective deployment of IoT applications across multiple domains, through a thorough examination of these cutting-edge technologies and approaches
30- 50
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